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Please use this identifier to cite or link to this item: https://doi.org/10.1109/IEDM.2006.346840
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dc.titleUltra-narrow silicon nanowire gate-all-around CMOS devices: Impact of diameter, channel-orientation and low temperature on device performance
dc.contributor.authorSingh, N.
dc.contributor.authorLim, F.Y.
dc.contributor.authorFang, W.W.
dc.contributor.authorRustagi, S.C.
dc.contributor.authorBera, L.K.
dc.contributor.authorAgarwal, A.
dc.contributor.authorTung, C.H.
dc.contributor.authorHoe, K.M.
dc.contributor.authorOmampuliyur, S.R.
dc.contributor.authorTripathi, D.
dc.contributor.authorAdeyeye, A.O.
dc.contributor.authorLo, G.Q.
dc.contributor.authorBalasubramanian, N.
dc.contributor.authorKwong, D.L.
dc.date.accessioned2014-10-07T04:51:30Z
dc.date.available2014-10-07T04:51:30Z
dc.date.issued2006
dc.identifier.citationSingh, N.,Lim, F.Y.,Fang, W.W.,Rustagi, S.C.,Bera, L.K.,Agarwal, A.,Tung, C.H.,Hoe, K.M.,Omampuliyur, S.R.,Tripathi, D.,Adeyeye, A.O.,Lo, G.Q.,Balasubramanian, N.,Kwong, D.L. (2006). Ultra-narrow silicon nanowire gate-all-around CMOS devices: Impact of diameter, channel-orientation and low temperature on device performance. Technical Digest - International Electron Devices Meeting, IEDM : -. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/IEDM.2006.346840" target="_blank">https://doi.org/10.1109/IEDM.2006.346840</a>
dc.identifier.isbn1424404398
dc.identifier.issn01631918
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/84334
dc.description.abstractFully CMOS compatible Silicon-nanowire (SiNW) Gate-All-Around (GAA) n- and p-MOS transistors are fabricated with nanowire channel in different crystal orientations and characterized at various temperatures down to 5K. SiNW width is controlled in 1 nm steps and varied from 3 to 6 nm. Devices show high drive current (2.4 mA/μm for n-FET, 1.3 mA/μm for p-FET), excellent gate control, and reduced sensitivity to temperature. Strong evidences of carrier confinement are noticed in term of Id-V8 oscillations and shift in threshold voltage with SiNW diameter. Orientation impact has been investigated as well.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/IEDM.2006.346840
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/IEDM.2006.346840
dc.description.sourcetitleTechnical Digest - International Electron Devices Meeting, IEDM
dc.description.page-
dc.description.codenTDIMD
dc.identifier.isiutNOT_IN_WOS
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