Please use this identifier to cite or link to this item:
https://doi.org/10.1109/VLSIT.2008.4588605
DC Field | Value | |
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dc.title | Selenium Co-implantation and segregation as a new contact technology for nanoscale SOI N-FETs featuring NiSi:C formed on Silicon-carbon (Si:C) source/drain stressors | |
dc.contributor.author | Wong, H.-S. | |
dc.contributor.author | Liu, F.-Y. | |
dc.contributor.author | Ang, K.-W. | |
dc.contributor.author | Koh, S.-M. | |
dc.contributor.author | Koh, A.T.-Y. | |
dc.contributor.author | Liow, T.-Y. | |
dc.contributor.author | Lee, R.T.-P. | |
dc.contributor.author | Lim, A.E.-J. | |
dc.contributor.author | Fang, W.-W. | |
dc.contributor.author | Zhu, M. | |
dc.contributor.author | Chan, L. | |
dc.contributor.author | Balasubramaniam, N. | |
dc.contributor.author | Samudra, G. | |
dc.contributor.author | Yeo, Y.-C. | |
dc.date.accessioned | 2014-10-07T04:49:33Z | |
dc.date.available | 2014-10-07T04:49:33Z | |
dc.date.issued | 2008 | |
dc.identifier.citation | Wong, H.-S.,Liu, F.-Y.,Ang, K.-W.,Koh, S.-M.,Koh, A.T.-Y.,Liow, T.-Y.,Lee, R.T.-P.,Lim, A.E.-J.,Fang, W.-W.,Zhu, M.,Chan, L.,Balasubramaniam, N.,Samudra, G.,Yeo, Y.-C. (2008). Selenium Co-implantation and segregation as a new contact technology for nanoscale SOI N-FETs featuring NiSi:C formed on Silicon-carbon (Si:C) source/drain stressors. Digest of Technical Papers - Symposium on VLSI Technology : 168-169. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/VLSIT.2008.4588605" target="_blank">https://doi.org/10.1109/VLSIT.2008.4588605</a> | |
dc.identifier.isbn | 9781424418053 | |
dc.identifier.issn | 07431562 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/84165 | |
dc.description.abstract | We report a novel contact technology comprising Selenium (Se) co-implantation and segregation to reduce Schottky barrier height ΦBn and contact resistance for n-FETs. Introducing Se at the silicide-semiconductor interface pins the Fermi level near the conduction band, and achieves a record low ΦBn of 0.1 eV on Si:C S/D stressors. Comparable sheet resistance and junction leakage are observed with and without Se segregation. When integrated in nanoscale SOI n-FETs with Ni-silicided Si:C S/D, the new Se-segregation contact technology achieves 36% reduction in total series resistance and 32% ION enhancement. Linear transconductance GMLin also shows large enhancement in the sample with Se-segregated contacts. © 2008 IEEE. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/VLSIT.2008.4588605 | |
dc.source | Scopus | |
dc.type | Conference Paper | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.description.doi | 10.1109/VLSIT.2008.4588605 | |
dc.description.sourcetitle | Digest of Technical Papers - Symposium on VLSI Technology | |
dc.description.page | 168-169 | |
dc.description.coden | DTPTE | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Staff Publications |
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