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Please use this identifier to cite or link to this item: https://doi.org/10.1109/.2005.1469207
DC FieldValue
dc.titleDual metal gate process by metal substitution of dopant-free polysilicon on high-K dielectric
dc.contributor.authorPark, C.S.
dc.contributor.authorCho, B.J.
dc.contributor.authorHwang, W.S.
dc.contributor.authorLoh, W.Y.
dc.contributor.authorTang, L.J.
dc.contributor.authorKwong, D.-L.
dc.date.accessioned2014-10-07T04:43:38Z
dc.date.available2014-10-07T04:43:38Z
dc.date.issued2005
dc.identifier.citationPark, C.S.,Cho, B.J.,Hwang, W.S.,Loh, W.Y.,Tang, L.J.,Kwong, D.-L. (2005). Dual metal gate process by metal substitution of dopant-free polysilicon on high-K dielectric. Digest of Technical Papers - Symposium on VLSI Technology 2005 : 48-49. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/.2005.1469207" target="_blank">https://doi.org/10.1109/.2005.1469207</a>
dc.identifier.issn07431562
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/83651
dc.description.abstractDual metal gate integration scheme of using substituted Al (SA) and Pt xSi with high Pt concentration on high-K dielectric is proposed. The process can achieve a wide range of work function difference (0.65 eV) and is almost free from Fermi level pinning, without adverse effects of polysilicon pre-doping.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/.2005.1469207
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/.2005.1469207
dc.description.sourcetitleDigest of Technical Papers - Symposium on VLSI Technology
dc.description.volume2005
dc.description.page48-49
dc.description.codenDTPTE
dc.identifier.isiutNOT_IN_WOS
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