Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/83604
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dc.titleDemonstration of a new approach towards 0.25V Low-Vt CMOS using Ni-based FUSI
dc.contributor.authorYu, H.Y.
dc.contributor.authorKittl, J.A.
dc.contributor.authorLauwers, A.
dc.contributor.authorSinganamalla, R.
dc.contributor.authorDemeurisse, C.
dc.contributor.authorKubicek, S.
dc.contributor.authorAugendre, E.
dc.contributor.authorVeloso, A.
dc.contributor.authorBrus, S.
dc.contributor.authorVrancken, C.
dc.contributor.authorHoffmann, T.
dc.contributor.authorMertens, S.
dc.contributor.authorOnsia, B.
dc.contributor.authorVerbeeck, R.
dc.contributor.authorDemand, M.
dc.contributor.authorRothchild, A.
dc.contributor.authorFroment, B.
dc.contributor.authorVan Dal, M.
dc.contributor.authorDe Meyer, K.
dc.contributor.authorLi, M.F.
dc.contributor.authorChen, J.D.
dc.contributor.authorJurczak, M.
dc.contributor.authorAbsil, P.P.
dc.contributor.authorBiesemans, S.
dc.date.accessioned2014-10-07T04:43:05Z
dc.date.available2014-10-07T04:43:05Z
dc.date.issued2006
dc.identifier.citationYu, H.Y.,Kittl, J.A.,Lauwers, A.,Singanamalla, R.,Demeurisse, C.,Kubicek, S.,Augendre, E.,Veloso, A.,Brus, S.,Vrancken, C.,Hoffmann, T.,Mertens, S.,Onsia, B.,Verbeeck, R.,Demand, M.,Rothchild, A.,Froment, B.,Van Dal, M.,De Meyer, K.,Li, M.F.,Chen, J.D.,Jurczak, M.,Absil, P.P.,Biesemans, S. (2006). Demonstration of a new approach towards 0.25V Low-Vt CMOS using Ni-based FUSI. Digest of Technical Papers - Symposium on VLSI Technology : 98-99. ScholarBank@NUS Repository.
dc.identifier.isbn1424400058
dc.identifier.issn07431562
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/83604
dc.description.abstractThis report discusses a new and practical approach to implement low V t bulk CMOS using Ni-based FUSI MOSFETs. On the nFET, we demonstrate for the first time that incorporating Yb by ion implantation can achieve similar reduction of effective work function (WF) compared to alloying making it a candidate for CMOS integration. We complement our previous work on WF modulation by Yb on NiSi/SiON with new data on NiSi/HfSiON and NiGeSi/HfSiON. On the pFET, we study the effect of Al and Pt on Ni-rich FUSI and integrate it with a SiGe-channel. Integration into our reference devices resulted in a V1 reduction from 0.55/0.61V down to 0.30/0.25V for nFET (NiSi:Yb gate) and pFET (Ni 2Si:Pt gate + SiGe channel) respectively on SiON without degradation of the dielectric integrity and long channel mobility, and without an increase in gate leakage and Dit. © 2006 IEEE.
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.sourcetitleDigest of Technical Papers - Symposium on VLSI Technology
dc.description.page98-99
dc.description.codenDTPTE
dc.identifier.isiutNOT_IN_WOS
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