Please use this identifier to cite or link to this item: https://doi.org/10.1109/TED.2012.2211881
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dc.titlePhase-change random access memory with multilevel resistances implemented using a dual phase-change material stack
dc.contributor.authorGyanathan, A.
dc.contributor.authorYeo, Y.-C.
dc.date.accessioned2014-10-07T04:34:40Z
dc.date.available2014-10-07T04:34:40Z
dc.date.issued2012
dc.identifier.citationGyanathan, A., Yeo, Y.-C. (2012). Phase-change random access memory with multilevel resistances implemented using a dual phase-change material stack. IEEE Transactions on Electron Devices 59 (11) : 2910-2916. ScholarBank@NUS Repository. https://doi.org/10.1109/TED.2012.2211881
dc.identifier.issn00189383
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/82887
dc.description.abstractThis paper investigates the multilevel behavior of phase-change random access memory devices with a dual phase-change material (PCM) stack, i.e., two PCMs stacked on one another. The dual PCM stack comprises of a Ge 2 Sb 2 Te 5 (GST) layer and a top PCM layer sandwiching a SiN barrier layer. The top PCM layer was varied in three different splits: Ag 0.5In 0.5 Sb 3 Te 6 (AIST), Ge-{1}\hbox{Sb}-{4}\hbox{Te} 7 (GST147), and nitrogen-doped GST (NGST). Extensive electrical characterization and statistical analysis were performed. The intrinsic properties of AIST, GST147, and NGST were used to explain the differences in electrical performances of the three multilevel device splits. The AIST/SiN/GST device split was found to have had the best electrical performance. The difference in electrical resistivities and thermal conductivities played a major role in the power consumption as well as the resistance values of the three multilevel states in these dual PCM multilevel devices. © 2012 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/TED.2012.2211881
dc.sourceScopus
dc.subjectAg 0.5In 0.5 Sb 3 Te 6 (AIST)
dc.subjectcrystallization temperature
dc.subjectGe 1 Sb 4 Te 7 (GST147)
dc.subjectGe 2 Sb 2 Te 5 (GST)
dc.subjectmelting temperature
dc.subjectmultilevel
dc.subjectnitrogen-doped GST (NGST)
dc.subjectphase-change random access memory (PCRAM)
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/TED.2012.2211881
dc.description.sourcetitleIEEE Transactions on Electron Devices
dc.description.volume59
dc.description.issue11
dc.description.page2910-2916
dc.description.codenIETDA
dc.identifier.isiut000310385100007
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