Modelling on-chip circular double-spiral stacked inductors for RFICs

Abstract

Extensive experimental results and detailed investigations of the performance of on-chip circular double-spiral stacked inductors on silicon substrates are presented. Based on a proposed equivalent circuit model and measured S-parameters using the de-embedding technique, the inductance L, resonant frequency fres, Q-factor, coupling capacitance between the upper and lower spirals, and oxide capacitance of these inductors are extracted and compared with the single-spiral case. Some locally scalable formulas, including single-spiral geometries, are obtained to predict inductor performance. Methods to improve the L and Q-factor are explored for double-spiral stacked inductors with single via connection.