Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/82182
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dc.titleDual Poly-Si Gate Metal Oxide Semiconductor Field Effect Transistors Fabricated with High-Quality Chemical Vapor Deposition HfO 2 Gate Dielectrics
dc.contributor.authorLee, S.
dc.contributor.authorKwong, D.-L.
dc.date.accessioned2014-10-07T04:26:21Z
dc.date.available2014-10-07T04:26:21Z
dc.date.issued2003-12
dc.identifier.citationLee, S.,Kwong, D.-L. (2003-12). Dual Poly-Si Gate Metal Oxide Semiconductor Field Effect Transistors Fabricated with High-Quality Chemical Vapor Deposition HfO 2 Gate Dielectrics. Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers 42 (12) : 7256-7258. ScholarBank@NUS Repository.
dc.identifier.issn00214922
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/82182
dc.description.abstractIn this paper, we report the electrical characteristics of n- and p-metal oxide semiconductor field effect transistors (MOSFETs) fabricated using a high-quality ultrathin (equivalent oxide thickness ∼11 Å) chemical vapor deposition (CVD) HfO 2 gate stack with a selfaligned dual poly-Si gate process. The CVD HfO 2 gate stack exhibits excellent thermal stability with the poly-Si gate up to 1050°C, after 30 s annealing. Good output MOS characteristics with high drive current capability, excellent subthreshold swings, and good mobility are obtained from both n- and p-MOSFETs.
dc.sourceScopus
dc.subjectCVD
dc.subjectHafnium oxide
dc.subjectHigh K
dc.subjectThermal stability
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.sourcetitleJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
dc.description.volume42
dc.description.issue12
dc.description.page7256-7258
dc.description.codenJAPND
dc.identifier.isiutNOT_IN_WOS
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