Please use this identifier to cite or link to this item: https://doi.org/10.1109/TBCAS.2013.2280066
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dc.titleA compact, low input capacitance neural recording amplifier
dc.contributor.authorNg, K.A.
dc.contributor.authorXu, Y.P.
dc.date.accessioned2014-10-07T04:22:22Z
dc.date.available2014-10-07T04:22:22Z
dc.date.issued2013
dc.identifier.citationNg, K.A., Xu, Y.P. (2013). A compact, low input capacitance neural recording amplifier. IEEE Transactions on Biomedical Circuits and Systems 7 (5) : 610-620. ScholarBank@NUS Repository. https://doi.org/10.1109/TBCAS.2013.2280066
dc.identifier.issn19324545
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/81845
dc.description.abstractConventional capacitively coupled neural recording amplifiers often present a large input load capacitance to the neural signal source and hence take up large circuit area. They suffer due to the unavoidable trade-off between the input capacitance and chip area versus the amplifier gain. In this work, this trade-off is relaxed by replacing the single feedback capacitor with a clamped T-capacitor network. With this simple modification, the proposed amplifier can achieve the same mid-band gain with less input capacitance, resulting in a higher input impedance and a smaller silicon area. Prototype neural recording amplifiers based on this proposal were fabricated in 0.35 μm CMOS, and their performance is reported. The amplifiers occupy smaller area and have lower input loading capacitance compared to conventional neural amplifiers. One of the proposed amplifiers occupies merely 0.056 mm2. It achieves 38.1-dB mid-band gain with 1.6 pF input capacitance, and hence has an effective feedback capacitance of 20 fF. Consuming 6 μ W, it has an input referred noise of 13.3 μ Vrms over 8.5 kHz bandwidth and NEF of 7.87. In-vivo recordings from animal experiments are also demonstrated. © 2007-2012 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/TBCAS.2013.2280066
dc.sourceScopus
dc.subjectBiopotential amplifier
dc.subjectCMOS
dc.subjectInput impedance
dc.subjectNeural recording
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/TBCAS.2013.2280066
dc.description.sourcetitleIEEE Transactions on Biomedical Circuits and Systems
dc.description.volume7
dc.description.issue5
dc.description.page610-620
dc.identifier.isiut000326622800007
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