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https://doi.org/10.1117/12.284613
DC Field | Value | |
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dc.title | Constant current-stress induced breakdown of reoxidized nitrided oxide (ONO) in Flash memory devices | |
dc.contributor.author | Cha, C.L. | |
dc.contributor.author | Chor, E.F. | |
dc.contributor.author | Gong, H. | |
dc.contributor.author | Zhang, A.Q. | |
dc.contributor.author | Chan, L. | |
dc.contributor.author | Xie, J. | |
dc.date.accessioned | 2014-10-07T03:07:49Z | |
dc.date.available | 2014-10-07T03:07:49Z | |
dc.date.issued | 1997 | |
dc.identifier.citation | Cha, C.L., Chor, E.F., Gong, H., Zhang, A.Q., Chan, L., Xie, J. (1997). Constant current-stress induced breakdown of reoxidized nitrided oxide (ONO) in Flash memory devices. Proceedings of SPIE - The International Society for Optical Engineering 3212 : 368-375. ScholarBank@NUS Repository. https://doi.org/10.1117/12.284613 | |
dc.identifier.issn | 0277786X | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/81391 | |
dc.description.abstract | Flash memory devices, using reoxidized nitrided oxide (ONO) as the interpoly dielectric, have shown rapid degradation in performance under positive and negative constant current-stressing, especially so for the latter case. It is essential and of great urgency to improve the breakdown time (tbd) of the dielectric layer for the application of programming and erasing of Flash memory devices. The average dielectric breakdown time of a standard Flash test stack, upon a 1μA positive constant current-stress, is about 50 seconds. Possible causes for the poor performance of the devices under such current stresses, are the rough surface of the bottom polysilicon layer, trapped fluoride ions at the interfaces within the ONO layer and the changes in the occupancy of the interfacial states at the interfaces between the polysilicon layers and the oxides. In this work, we reported the tbds of a type of test stack, that were fabricated in two ways: some test stacks were defined using the normal (standard) etch process flow (Stack X) while the others had numerous extended overetch (OE) process flow (Stack Z). The latter stacks recorded a higher average tbd value under positive constant current-stressed. Therefore, this work suggested that slight extension of OE duration can be used to improve the tbd of the memory devices under currentstressing. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1117/12.284613 | |
dc.source | Scopus | |
dc.subject | Amorphous silicon base | |
dc.subject | Bottom polysilicon layer | |
dc.subject | Changes in occupancy of interfacial states | |
dc.subject | Flash memory devices | |
dc.subject | Negative constant current-stressing | |
dc.subject | ONO | |
dc.subject | Positive constant current-stressing | |
dc.subject | Rough surface | |
dc.subject | Stack overetch | |
dc.subject | Trapped fluoride ions | |
dc.type | Conference Paper | |
dc.contributor.department | MATERIALS SCIENCE | |
dc.contributor.department | ELECTRICAL ENGINEERING | |
dc.description.doi | 10.1117/12.284613 | |
dc.description.sourcetitle | Proceedings of SPIE - The International Society for Optical Engineering | |
dc.description.volume | 3212 | |
dc.description.page | 368-375 | |
dc.description.coden | PSISD | |
dc.identifier.isiut | A1997BJ64W00041 | |
Appears in Collections: | Staff Publications |
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