Plasma etching optimization of oxide/nitride/oxide interpoly dielectric breakdown time in flash memory devices

Abstract

The breakdown time of flash memory oxide/nitride/oxide (ONO) layer tbd under positive constant current stressing has been found to be closely related to the cumulative extent of (over)etch of the tungsten silicide, control polysilicon, and ONO layers, i.e., Σ(ΛOE). An empirical first-order relation between tbd and Σ(ΛOE) has been derived to facilitate the plasma etch recipe optimization. This has led to a four-fold increase in the average tbd across a 200-mm wafer to 208 s. More importantly, the spread in tbd has been tightened to ∼5%, which is down from ∼54%. © 2000 IEEE.