Electron trapping and interface state generation in PMOSFET's: Results from gate capacitance

Abstract

Significant generation of hot-carrier induced donor and acceptor interface states in PMOSFET's is observed for the first time from gate-to-drain capacitance Cgd* s. Plotting the change ΔCgd* s against gate bias reveals two peaks, attributed to donor and acceptor states. A voltage on the drain displaces the donor peak by approximately the amount of the applied voltage, but the acceptor peak shifts by a fixed amount.