Please use this identifier to cite or link to this item: https://doi.org/10.1145/2499369.2465566
DC FieldValue
dc.titleProgram performance spectrum
dc.contributor.authorChattopadhyay, S.
dc.contributor.authorChong, L.K.
dc.contributor.authorRoychoudhury, A.
dc.date.accessioned2014-07-04T03:14:45Z
dc.date.available2014-07-04T03:14:45Z
dc.date.issued2013
dc.identifier.citationChattopadhyay, S., Chong, L.K., Roychoudhury, A. (2013). Program performance spectrum. ACM SIGPLAN Notices 48 (5) : 65-75. ScholarBank@NUS Repository. https://doi.org/10.1145/2499369.2465566
dc.identifier.issn15232867
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/78301
dc.description.abstractReal-time and embedded applications often need to satisfy several non-functional properties such as timing. Consequently, performance validation is a crucial stage before the deployment of real-time and embedded software. Cache memories are often used to bridge the performance gap between a processor and memory subsystems. As a result, the analysis of caches plays a key role in the performance validation of real-time, embedded software. In this paper, we propose a novel approach to compute the cache performance signature of an entire program. Our technique is based on exploring the input domain through different path programs. Two paths belong to the same path program if they follow the same set of control flow edges but may vary in the iterations of loops encountered. Our experiments with several subject programs show that the different paths grouped into a path program have very similar and often exactly same cache performance. Our path program exploration can be viewed as partitioning the input domain of the program. Each partition is associated with its cache performance and a symbolic formula capturing the set of program inputs which constitutes the partition. We show that such a partitioning technique has wide spread usages in performance prediction, testing, debugging and design space exploration. Copyright © 2013 ACM.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1145/2499369.2465566
dc.sourceScopus
dc.subjectCache memories
dc.subjectPath exploration
dc.subjectPerformance testing
dc.subjectSymbolic execution
dc.typeConference Paper
dc.contributor.departmentCOMPUTER SCIENCE
dc.description.doi10.1145/2499369.2465566
dc.description.sourcetitleACM SIGPLAN Notices
dc.description.volume48
dc.description.issue5
dc.description.page65-75
dc.identifier.isiut000321865100008
Appears in Collections:Staff Publications

Show simple item record
Files in This Item:
There are no files associated with this item.

SCOPUSTM   
Citations

3
checked on Feb 24, 2020

WEB OF SCIENCETM
Citations

2
checked on Feb 24, 2020

Page view(s)

59
checked on Feb 17, 2020

Google ScholarTM

Check

Altmetric


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.