Please use this identifier to cite or link to this item:
https://doi.org/10.1145/2503210.2503234
DC Field | Value | |
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dc.title | Accelerating sparse matrix-vector multiplication on GPUs using bit-representation-optimized schemes | |
dc.contributor.author | Tang, W.T. | |
dc.contributor.author | Tan, W.J. | |
dc.contributor.author | Ray, R. | |
dc.contributor.author | Wong, Y.W. | |
dc.contributor.author | Chen, W. | |
dc.contributor.author | Kuo, S.-H. | |
dc.contributor.author | Goh, R.S.M. | |
dc.contributor.author | Turner, S.J. | |
dc.contributor.author | Wong, W.-F. | |
dc.date.accessioned | 2014-07-04T03:11:13Z | |
dc.date.available | 2014-07-04T03:11:13Z | |
dc.date.issued | 2013 | |
dc.identifier.citation | Tang, W.T., Tan, W.J., Ray, R., Wong, Y.W., Chen, W., Kuo, S.-H., Goh, R.S.M., Turner, S.J., Wong, W.-F. (2013). Accelerating sparse matrix-vector multiplication on GPUs using bit-representation-optimized schemes. International Conference for High Performance Computing, Networking, Storage and Analysis, SC : -. ScholarBank@NUS Repository. https://doi.org/10.1145/2503210.2503234 | |
dc.identifier.isbn | 9781450323789 | |
dc.identifier.issn | 21674337 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/77996 | |
dc.description.abstract | The sparse matrix-vector (SpMV) multiplication routine is an important building block used in many iterative algo-rithms for solving scientific and engineering problems. One of the main challenges of SpMV is its memory-boundedness. Although compression has been proposed previously to im-prove SpMV performance on CPUs, its use has not been demonstrated on the GPU because of the serial nature of many compression and decompression schemes. In this pa-per, we introduce a family of bit-representation-optimized (BRO) compression schemes for representing sparse matrices on GPUs. The proposed schemes, BRO-ELL, BRO-COO, and BRO-HYB, perform compression on index data and help to speed up SpMV on GPUs through reduction of memory trafic. Furthermore, we formulate a BRO-aware matrix re-ordering scheme as a data clustering problem and use it to increase compression ratios. With the proposed schemes, ex-periments show that average speedups of 1.5 compared to ELLPACK and HYB can be achieved for SpMV on GPUs. Copyright 2013 ACM. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1145/2503210.2503234 | |
dc.source | Scopus | |
dc.subject | Data compression | |
dc.subject | GPU | |
dc.subject | Matrix-vector multiplication | |
dc.subject | Memory bandwidth | |
dc.subject | Parallelism | |
dc.subject | Sparse matrix format | |
dc.type | Conference Paper | |
dc.contributor.department | COMPUTER SCIENCE | |
dc.description.doi | 10.1145/2503210.2503234 | |
dc.description.sourcetitle | International Conference for High Performance Computing, Networking, Storage and Analysis, SC | |
dc.description.page | - | |
dc.identifier.isiut | 000345856900027 | |
Appears in Collections: | Staff Publications |
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