Please use this identifier to cite or link to this item: https://doi.org/10.1007/s00542-006-0126-y
DC FieldValue
dc.titleA dielectrophoretic chip packaged at wafer level
dc.contributor.authorIliescu, C.
dc.contributor.authorTay, F.E.H.
dc.contributor.authorXu, G.
dc.contributor.authorYu, L.M.
dc.contributor.authorSamper, V.
dc.date.accessioned2014-06-19T05:30:13Z
dc.date.available2014-06-19T05:30:13Z
dc.date.issued2006-09
dc.identifier.citationIliescu, C., Tay, F.E.H., Xu, G., Yu, L.M., Samper, V. (2006-09). A dielectrophoretic chip packaged at wafer level. Microsystem Technologies 12 (10-11) : 987-992. ScholarBank@NUS Repository. https://doi.org/10.1007/s00542-006-0126-y
dc.identifier.issn09467076
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/73017
dc.description.abstractThe paper presents a dielectrophoretic chip, fully enclosed, with bulk silicon electrodes fabricated using wafer-to-wafer bonding techniques and packaged at the wafer level. The silicon electrodes, which are bonded to two glass dies, define in the same time the walls of the microfluidic channel. The device is fabricated from a silicon wafer that is bonded (at wafer level) anodically and using SU8 photoresist between two glass wafers. The first glass die includes drilled holes for inlet/outlet connections while the second glass die assure the electrical connections, through via holes and a metallization layer, between the silicon electrodes and a printing circuit board.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1007/s00542-006-0126-y
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentMECHANICAL ENGINEERING
dc.description.doi10.1007/s00542-006-0126-y
dc.description.sourcetitleMicrosystem Technologies
dc.description.volume12
dc.description.issue10-11
dc.description.page987-992
dc.identifier.isiut000239960600016
Appears in Collections:Staff Publications

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