Please use this identifier to cite or link to this item:
https://scholarbank.nus.edu.sg/handle/10635/72923
DC Field | Value | |
---|---|---|
dc.title | Single phase parallel power processing scheme with power factor control | |
dc.contributor.author | Srinivasan, Ramesh | |
dc.contributor.author | Oruganti, Ramesh | |
dc.date.accessioned | 2014-06-19T05:13:32Z | |
dc.date.available | 2014-06-19T05:13:32Z | |
dc.date.issued | 1995 | |
dc.identifier.citation | Srinivasan, Ramesh,Oruganti, Ramesh (1995). Single phase parallel power processing scheme with power factor control. Proceedings of the International Conference on Power Electronics and Drive Systems 1 : 40-47. ScholarBank@NUS Repository. | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/72923 | |
dc.description.abstract | A parallel power processing scheme is proposed. A conventional off-line converter is paralleled with a PFC converter resulting in less overall power handled and thus in improved efficiency. Excellent output dynamics is achieved by two control methods (method-1 and method-2). Method-1 proposes to cancel the second harmonic current component injected into the output capacitor by the FPC converter. The input dynamic performance was improved further in Method-2 which may be viewed as a modification of method-1. SABER simulation using both switched model and averaged model are utilized to confirmed the anticipated good performance of the proposed scheme. | |
dc.source | Scopus | |
dc.type | Conference Paper | |
dc.contributor.department | ELECTRICAL ENGINEERING | |
dc.description.sourcetitle | Proceedings of the International Conference on Power Electronics and Drive Systems | |
dc.description.volume | 1 | |
dc.description.page | 40-47 | |
dc.description.coden | 85RTA | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Staff Publications |
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