Estimation of the area of voids in deep-submicron aluminium interconnects using resistance-noise measurements

Abstract

Voids can form in aluminium (Al) interconnects as a result of electromigration, stress migration and process-related problems. Such voids can give rise to reliability issues such as an increase in interconnect resistance that increases the RC delay, and localised stress and heating effects, which further enhance electromigration. In this paper, a novel technique to estimate the effective void area in deep sub-micron Al lines using combined measurements of resistance fluctuation and low-frequency (flicker or 1/f) noise is presented. In the proposed model, fluctuations in voltage at low frequencies, related to resistance-noise fluctuations in the presence of voids in Al lines, were measured under constant-current biasing condition. The noise measurement is known to be more sensitive to device defects and the presence of voids as compared to the conventional technique of resistance measurement alone. A theoretical model that considers the thermal coefficient of resistance (TCR) in calculating the change in Al line resistance due to the presence of voids and temperature has been developed to extract the effective void area from the experimental data comprising both 1/f noise and resistance variations. In a case study, the focused-ion-beam (FIB) technique was employed to mill a precise quantity of holes onto metallization test structures consisting of narrow Al lines of various line widths. In this case, a known quantity of voids in the Al line was simulated. Noise spectra density data for the 1/f low-frequency voltage fluctuations and the corresponding line resistance were obtained. The theoretical model was applied to the experimental data and the extracted effective void area agrees well with the simulated void area generated by the FIB. Thus, this technique is a potentially useful reliability tool for detecting voids in VLSI interconnects.