Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/71920
DC FieldValue
dc.titleSynthesis and electronic application of germanium nanocrystals in silicon oxide matrix
dc.contributor.authorChoi, W.K.
dc.contributor.authorChim, W.K.
dc.contributor.authorChew, H.G.
dc.date.accessioned2014-06-19T03:29:20Z
dc.date.available2014-06-19T03:29:20Z
dc.date.issued2007
dc.identifier.citationChoi, W.K.,Chim, W.K.,Chew, H.G. (2007). Synthesis and electronic application of germanium nanocrystals in silicon oxide matrix. Materials Research Society Symposium Proceedings 959 : 95-100. ScholarBank@NUS Repository.
dc.identifier.isbn9781604234343
dc.identifier.issn02729172
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/71920
dc.description.abstractThe size of germanium (Ge) nanocrystals in a trilayer memory device structure was controlled by varying the thickness of the middle co-sputtered Ge plus silicon oxide layer. Such confinement of nanocrystals was not effective in a trilayer structure with a pure Ge middle layer. Significant diffusion of Ge atoms through the tunnel oxide or rapid thermal oxide (RTO) layer and into the silicon substrate was observed when the RTO layer thickness of the trilayer structure was reduced. This resulted in no (or very few) nanocrystals formed in the system. A higher charge storage capability was obtained from devices with a thinner RTO layer. © 2007 Materials Research Society.
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.sourcetitleMaterials Research Society Symposium Proceedings
dc.description.volume959
dc.description.page95-100
dc.description.codenMRSPD
dc.identifier.isiutNOT_IN_WOS
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