Low-cost gate drive for enhancement mode SiC JFET devices

Please use this identifier to cite or link to this item: https://doi.org/10.1109/ECCE-Asia.2013.6579183

Title:	Low-cost gate drive for enhancement mode SiC JFET devices
Authors:	Chan, Y.H. Liang, Y.C. Tien, D.
Keywords:	high temperature Introduction SiC JFET Gate Drive wide bandgap devices
Issue Date:	2013
Citation:	Chan, Y.H.,Liang, Y.C.,Tien, D. (2013). Low-cost gate drive for enhancement mode SiC JFET devices. 2013 IEEE ECCE Asia Downunder - 5th IEEE Annual International Energy Conversion Congress and Exhibition, IEEE ECCE Asia 2013 : 736-739. ScholarBank@NUS Repository. https://doi.org/10.1109/ECCE-Asia.2013.6579183
Abstract:	The main objective of this work is to develop a low cost gate drive circuit for the enhancement mode SiC JFET device with a comparable switching performance as those of commercial ones. To achieve this low cost requirement, the gate drive circuit design needs to use only components which are widely available. In this paper, the proposed SiC JFET gate drive circuit design is described and its switching performance is experimentally verified. The targeted cost per gate drive circuit is made to be less than US$10, which is a sizeable cost reduction in comparison to a commercially available gate drive. © 2013 IEEE.
Source Title:	2013 IEEE ECCE Asia Downunder - 5th IEEE Annual International Energy Conversion Congress and Exhibition, IEEE ECCE Asia 2013
URI:	http://scholarbank.nus.edu.sg/handle/10635/70842
ISBN:	9781479904822
DOI:	10.1109/ECCE-Asia.2013.6579183
Appears in Collections:	Staff Publications

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