Please use this identifier to cite or link to this item:
https://scholarbank.nus.edu.sg/handle/10635/69291
DC Field | Value | |
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dc.title | An asymmetrical half bridge flyback converter with Zero-Voltage and Zero-Current Switching | |
dc.contributor.author | Xu, X. | |
dc.contributor.author | Khambadkone, A.M. | |
dc.contributor.author | Oruganti, R. | |
dc.date.accessioned | 2014-06-19T02:59:01Z | |
dc.date.available | 2014-06-19T02:59:01Z | |
dc.date.issued | 2004 | |
dc.identifier.citation | Xu, X.,Khambadkone, A.M.,Oruganti, R. (2004). An asymmetrical half bridge flyback converter with Zero-Voltage and Zero-Current Switching. IECON Proceedings (Industrial Electronics Conference) 1 : 767-772. ScholarBank@NUS Repository. | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/69291 | |
dc.description.abstract | In this paper, the analysis and design of an asymmetrical half bridge flyback DC-DC converter is presented, which can minimize the switching power loss by realizing the Zero-Voltage-Switching (ZVS) during the transition between the two switches and the Zero-Current-Switching (ZCS) on the output diode. As a result, high efficiency can be achieved. The principle of the converter operation is explained and analyzed. In order to ensure the realization of ZVS in operation, the required interlock delay time between the gate signals of the two switches, the transformer leakage inductance, and the ZVS range of the output current variation are properly calculated. Experimental results from a 8V/8A, 200kHz circuit are also presented, which verify the theoretical analysis. © 2004 IEEE. | |
dc.source | Scopus | |
dc.type | Conference Paper | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.description.sourcetitle | IECON Proceedings (Industrial Electronics Conference) | |
dc.description.volume | 1 | |
dc.description.page | 767-772 | |
dc.description.coden | IEPRE | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Staff Publications |
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