Please use this identifier to cite or link to this item:
https://doi.org/10.1109/ISVLSI.2011.44
DC Field | Value | |
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dc.title | A design space exploration methodology for application specific MPSoC design | |
dc.contributor.author | Singh, A.K. | |
dc.contributor.author | Kumar, A. | |
dc.contributor.author | Srikanthan, T. | |
dc.date.accessioned | 2014-06-19T02:53:04Z | |
dc.date.available | 2014-06-19T02:53:04Z | |
dc.date.issued | 2011 | |
dc.identifier.citation | Singh, A.K., Kumar, A., Srikanthan, T. (2011). A design space exploration methodology for application specific MPSoC design. Proceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011 : 339-340. ScholarBank@NUS Repository. https://doi.org/10.1109/ISVLSI.2011.44 | |
dc.identifier.isbn | 9780769544472 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/68775 | |
dc.description.abstract | System designers need to perform design-space exploration (DSE) to find appropriate number and type of processing elements (PEs) to be present in a Multiprocessor Systems-on-Chip (MPSoC) to support a throughput-constrained application. This paper presents a DSE methodology that provides application to MPSoC architecture mappings, where different PEs get used. The methodology starts from a mapping using only one type of processors and evaluates different mappings by increasing heterogeneity to improve the performance. © 2011 IEEE. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/ISVLSI.2011.44 | |
dc.source | Scopus | |
dc.type | Conference Paper | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.description.doi | 10.1109/ISVLSI.2011.44 | |
dc.description.sourcetitle | Proceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011 | |
dc.description.page | 339-340 | |
dc.identifier.isiut | 000298386100066 | |
Appears in Collections: | Staff Publications |
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