Please use this identifier to cite or link to this item: https://doi.org/10.1109/ISVLSI.2011.44
DC FieldValue
dc.titleA design space exploration methodology for application specific MPSoC design
dc.contributor.authorSingh, A.K.
dc.contributor.authorKumar, A.
dc.contributor.authorSrikanthan, T.
dc.date.accessioned2014-06-19T02:53:04Z
dc.date.available2014-06-19T02:53:04Z
dc.date.issued2011
dc.identifier.citationSingh, A.K., Kumar, A., Srikanthan, T. (2011). A design space exploration methodology for application specific MPSoC design. Proceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011 : 339-340. ScholarBank@NUS Repository. https://doi.org/10.1109/ISVLSI.2011.44
dc.identifier.isbn9780769544472
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/68775
dc.description.abstractSystem designers need to perform design-space exploration (DSE) to find appropriate number and type of processing elements (PEs) to be present in a Multiprocessor Systems-on-Chip (MPSoC) to support a throughput-constrained application. This paper presents a DSE methodology that provides application to MPSoC architecture mappings, where different PEs get used. The methodology starts from a mapping using only one type of processors and evaluates different mappings by increasing heterogeneity to improve the performance. © 2011 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/ISVLSI.2011.44
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/ISVLSI.2011.44
dc.description.sourcetitleProceedings - 2011 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011
dc.description.page339-340
dc.identifier.isiut000298386100066
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