Please use this identifier to cite or link to this item: https://doi.org/10.1109/EDSSC.2007.4450295
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dc.titleA 180° phase shifter with small phase error for broadband applications
dc.contributor.authorTang, X.
dc.contributor.authorMouthaan, K.
dc.date.accessioned2014-06-19T02:52:15Z
dc.date.available2014-06-19T02:52:15Z
dc.date.issued2007
dc.identifier.citationTang, X.,Mouthaan, K. (2007). A 180° phase shifter with small phase error for broadband applications. IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007 : 997-1000. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/EDSSC.2007.4450295" target="_blank">https://doi.org/10.1109/EDSSC.2007.4450295</a>
dc.identifier.isbn1424406374
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/68701
dc.description.abstractIn commonly used multi-bit high-/low-pass phase shifters, the phase error is mostly due to the first bit, which provides the 180° phase shift. This paper explores the design of a 180° phase shifter that combines a high-pass filter with a transmission line to reduce the phase error over a large bandwidth. Compared to the conventional high-/low-pass phase shifter, the proposed phase shifter shows better performance in both phase error and amplitude balance over a broad bandwidth. To illustrate the principle, a 180°phase shifter using this topology is designed, fabricated and measured. The phase error is measured to be ±2°, ±3.5° and ±4.5° over a bandwidth of 31.8%, 43.4% and 49.3% respectively. The measured amplitude imbalance of the two branches is within 0.4 dB from 840 to 1310 MHz and the return loss is found to be better than 17 dB inclusive of the effect of the switches and the discrete components. © 2007 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/EDSSC.2007.4450295
dc.sourceScopus
dc.subject180° phase shifter
dc.subjectAmplitude balance
dc.subjectBroadband phase shifter
dc.subjectPhase error
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/EDSSC.2007.4450295
dc.description.sourcetitleIEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007
dc.description.page997-1000
dc.identifier.isiutNOT_IN_WOS
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