Please use this identifier to cite or link to this item: https://doi.org/10.1039/c2nr12134d
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dc.titleEnhancing charge-storage capacity of non-volatile memory devices using template-directed assembly of gold nanoparticles
dc.contributor.authorGupta, R.K.
dc.contributor.authorKrishnamoorthy, S.
dc.contributor.authorKusuma, D.Y.
dc.contributor.authorLee, P.S.
dc.contributor.authorSrinivasan, M.P.
dc.date.accessioned2014-06-17T07:40:17Z
dc.date.available2014-06-17T07:40:17Z
dc.date.issued2012-04-07
dc.identifier.citationGupta, R.K., Krishnamoorthy, S., Kusuma, D.Y., Lee, P.S., Srinivasan, M.P. (2012-04-07). Enhancing charge-storage capacity of non-volatile memory devices using template-directed assembly of gold nanoparticles. Nanoscale 4 (7) : 2296-2300. ScholarBank@NUS Repository. https://doi.org/10.1039/c2nr12134d
dc.identifier.issn20403364
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/63849
dc.description.abstractWe demonstrate the controlled fabrication of aggregates of gold nanoparticles as a means of enhancing the charge-storage capacity of metal-insulator-semiconductor (MIS) devices by up to 300% at a low biasing voltage of ±4 V. Aggregates of citrate stabilized gold nanoparticles were obtained by directed electrostatic self-assembly onto an underlying nanopattern of positively charged centers. The underlying nanopatterns consist of amine functionalized gold nanoparticle arrays formed using amphiphilic diblock copolymer reverse micelles as templates. The hierarchical self-organization leads to a twelve-fold increase in the number density of the gold nanoparticles and therefore significantly increases the charge storage centers for the MIS device. The MIS structure showed counterclockwise C-V hysteresis curves indicating a good memory effect. A memory window of 1 V was obtained at a low biasing voltage of ±4 V. Furthermore, C-t measurements conducted after applying a charging bias of 4 V showed that the charge was retained beyond 20000 s. The proposed strategy can be readily adapted for fabricating next generation solution processible non-volatile memory devices. © 2012 The Royal Society of Chemistry.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1039/c2nr12134d
dc.sourceScopus
dc.typeArticle
dc.contributor.departmentCHEMICAL & BIOMOLECULAR ENGINEERING
dc.description.doi10.1039/c2nr12134d
dc.description.sourcetitleNanoscale
dc.description.volume4
dc.description.issue7
dc.description.page2296-2300
dc.identifier.isiut000301591300016
Appears in Collections:Staff Publications

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