Please use this identifier to cite or link to this item:
https://scholarbank.nus.edu.sg/handle/10635/62425
DC Field | Value | |
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dc.title | Modeling of chip resistors for high-frequency microwave applications with the use of the FD-TD method | |
dc.contributor.author | Lau, Y.C. | |
dc.contributor.author | Leong, M.S. | |
dc.contributor.author | Kooi, P.S. | |
dc.date.accessioned | 2014-06-17T06:50:54Z | |
dc.date.available | 2014-06-17T06:50:54Z | |
dc.date.issued | 1997-04-05 | |
dc.identifier.citation | Lau, Y.C.,Leong, M.S.,Kooi, P.S. (1997-04-05). Modeling of chip resistors for high-frequency microwave applications with the use of the FD-TD method. Microwave and Optical Technology Letters 14 (5) : 259-261. ScholarBank@NUS Repository. | |
dc.identifier.issn | 08952477 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/62425 | |
dc.description.abstract | The FD-TD method was used to model physical chip resistors with the used of the lumped-element concept. Instead of using the conventional planar resistive elements approximation, we modeled the substrate on which the resistive element is fabricated as well. Comparing our numerical results with experimental measurements performed on chip resistors of representative values of 10 and 820 Ω, we have found that our model significantly outperforms the present planar scheme for frequencies up to 20 GHz. As an application of our chip-resistor model, we have investigated a microstrip power divider/combiner with isolation resistor. © 1997 John Wiley & Sons, Inc. | |
dc.source | Scopus | |
dc.subject | Chip-resistor modeling | |
dc.subject | FD-TD method | |
dc.type | Article | |
dc.contributor.department | ELECTRICAL ENGINEERING | |
dc.description.sourcetitle | Microwave and Optical Technology Letters | |
dc.description.volume | 14 | |
dc.description.issue | 5 | |
dc.description.page | 259-261 | |
dc.description.coden | MOTLE | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Staff Publications |
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