Please use this identifier to cite or link to this item:
https://doi.org/10.1109/78.806074
DC Field | Value | |
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dc.title | An efficient algorithm to design weighted minimax perfect reconstruction quadrature mirror filter banks | |
dc.contributor.author | Goh, C.-K. | |
dc.contributor.author | Lim, Y.C. | |
dc.date.accessioned | 2014-06-17T06:44:06Z | |
dc.date.available | 2014-06-17T06:44:06Z | |
dc.date.issued | 1999 | |
dc.identifier.citation | Goh, C.-K., Lim, Y.C. (1999). An efficient algorithm to design weighted minimax perfect reconstruction quadrature mirror filter banks. IEEE Transactions on Signal Processing 47 (12) : 3303-3314. ScholarBank@NUS Repository. https://doi.org/10.1109/78.806074 | |
dc.identifier.issn | 1053587X | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/61798 | |
dc.description.abstract | An efficient algorithm is presented in this paper to design lattice structure two-channel perfect reconstruction quadrature mirror filter (PR-QMF) banks. We formulate the filter bank design problem as an unconstrained weighted least squares problem with respect to the coefficients of the lattice structure. The proposed iterative algorithm optimizes the lattice coefficients and provides flexible control of the filters' stopband ripple profiles. Typically only a few iterations of the algorithm are needed to obtain an optimal solution in the weighted minimax sense. We include a set of practical design rules for use with our algorithm. These rules allow very good estimation of important filter bank characteristics such as the filter length and the number of signed digits for quantization of the lattice coefficients into canonic signed digit representation to meet a given set of PR-QMF bank specifications. © 1999 IEEE. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/78.806074 | |
dc.source | Scopus | |
dc.subject | Canonic signed digit representation | |
dc.subject | Lattice structure | |
dc.subject | Multirate perfect reconstruction filter banks | |
dc.subject | Weighted least squares design technique | |
dc.type | Article | |
dc.contributor.department | ELECTRICAL ENGINEERING | |
dc.description.doi | 10.1109/78.806074 | |
dc.description.sourcetitle | IEEE Transactions on Signal Processing | |
dc.description.volume | 47 | |
dc.description.issue | 12 | |
dc.description.page | 3303-3314 | |
dc.description.coden | ITPRE | |
dc.identifier.isiut | 000083991800010 | |
Appears in Collections: | Staff Publications |
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