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Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/57063
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dc.titlePID tuning for dominant poles and phase margin
dc.contributor.authorTang, W.
dc.contributor.authorWang, Q.-G.
dc.contributor.authorYe, Z.
dc.contributor.authorZhang, Z.
dc.date.accessioned2014-06-17T03:01:50Z
dc.date.available2014-06-17T03:01:50Z
dc.date.issued2007-12
dc.identifier.citationTang, W.,Wang, Q.-G.,Ye, Z.,Zhang, Z. (2007-12). PID tuning for dominant poles and phase margin. Asian Journal of Control 9 (4) : 466-469. ScholarBank@NUS Repository.
dc.identifier.issn15618625
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/57063
dc.description.abstractA simple PID tuning method for dominant pole placement and phase margin specification is proposed in this paper. Time domain specifications as settling time and percentage overshoot are represented by a pair of dominant poles, which is combined with phase margin specification to achieve closed-loop stability and robustness. A graphical method is developed to determine PID settings to meet these specifications simultaneously. An example is given for illustration.
dc.sourceScopus
dc.subjectDominant pole placement
dc.subjectGraphical method
dc.subjectPhase margin
dc.subjectPID controller
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.sourcetitleAsian Journal of Control
dc.description.volume9
dc.description.issue4
dc.description.page466-469
dc.identifier.isiutNOT_IN_WOS
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