Please use this identifier to cite or link to this item: https://doi.org/10.1109/TED.2004.829861
DC FieldValue
dc.titleOver-erase phenomenon in SONOS-type flash memory and its minimization using a hafnium oxide charge storage layer
dc.contributor.authorTan, Y.-N.
dc.contributor.authorChim, W.-K.
dc.contributor.authorCho, B.J.
dc.contributor.authorChoi, W.-K.
dc.date.accessioned2014-06-17T03:00:53Z
dc.date.available2014-06-17T03:00:53Z
dc.date.issued2004-07
dc.identifier.citationTan, Y.-N., Chim, W.-K., Cho, B.J., Choi, W.-K. (2004-07). Over-erase phenomenon in SONOS-type flash memory and its minimization using a hafnium oxide charge storage layer. IEEE Transactions on Electron Devices 51 (7) : 1143-1147. ScholarBank@NUS Repository. https://doi.org/10.1109/TED.2004.829861
dc.identifier.issn00189383
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/56980
dc.description.abstractThe over-erase phenomenon in the polysilicon-oxide-silicon nitride-oxide-silicon (SONOS) memory structure is minimized by using hafnium oxide or hafnium aluminum oxide to replace silicon nitride as the charge storage layer (the resulting structures are termed SOHOS devices, where the "H" denotes the high dielectric constant material instead of silicon nitride). Unlike SONOS devices, SOHOS structures show a reduced over-erase phenomenon and self-limiting charge storage behavior under both erase and program operations. These are attributed to the differences in band offset and the crystallinity of the charge storage layer. © 2004 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/TED.2004.829861
dc.sourceScopus
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/TED.2004.829861
dc.description.sourcetitleIEEE Transactions on Electron Devices
dc.description.volume51
dc.description.issue7
dc.description.page1143-1147
dc.description.codenIETDA
dc.identifier.isiut000222279200016
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