Please use this identifier to cite or link to this item: https://doi.org/10.1109/LED.2002.803770
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dc.titleA simple technology for superjunction device fabrication: Polyflanked VDMOSFET
dc.contributor.authorGan, K.P.
dc.contributor.authorYang, X.
dc.contributor.authorLiang, Y.C.
dc.contributor.authorSamudra, G.S.
dc.contributor.authorYong, L.
dc.date.accessioned2014-06-17T02:35:47Z
dc.date.available2014-06-17T02:35:47Z
dc.date.issued2002-10
dc.identifier.citationGan, K.P., Yang, X., Liang, Y.C., Samudra, G.S., Yong, L. (2002-10). A simple technology for superjunction device fabrication: Polyflanked VDMOSFET. IEEE Electron Device Letters 23 (10) : 627-629. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2002.803770
dc.identifier.issn07413106
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/54810
dc.description.abstractThe charge compensation based novel superjunction (SJ) MOSFET outperforms its conventional counterpart. However, the production of SJ devices is limited by its complicated and costly fabrication process. In this letter, a feasible technology on polyflanked vertical double-diffused MOS SJ structure, as in Gan et al., is introduced and demonstrated to have greatly reduced fabrication costs, simplified processes, and overcome the interdiffusion problem of SJ columns. This brings forth the new milestone that SJ MOS devices can now be fabricated by the standard cleanroom facilities.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/LED.2002.803770
dc.sourceScopus
dc.subjectPower MOSFET
dc.subjectSuperjunction device
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/LED.2002.803770
dc.description.sourcetitleIEEE Electron Device Letters
dc.description.volume23
dc.description.issue10
dc.description.page627-629
dc.description.codenEDLED
dc.identifier.isiut000178497900019
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