Please use this identifier to cite or link to this item:
https://doi.org/10.1016/j.tsf.2004.05.120
DC Field | Value | |
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dc.title | A FinFET and Tri-gate MOSFET's channel structure patterning and its influence on the device performance | |
dc.contributor.author | Jagar, S. | |
dc.contributor.author | Singh, N. | |
dc.contributor.author | Mehta, S.S. | |
dc.contributor.author | Agrawal, N. | |
dc.contributor.author | Samudra, G. | |
dc.contributor.author | Balasubramanian, N. | |
dc.date.accessioned | 2014-06-16T09:28:00Z | |
dc.date.available | 2014-06-16T09:28:00Z | |
dc.date.issued | 2004-09 | |
dc.identifier.citation | Jagar, S., Singh, N., Mehta, S.S., Agrawal, N., Samudra, G., Balasubramanian, N. (2004-09). A FinFET and Tri-gate MOSFET's channel structure patterning and its influence on the device performance. Thin Solid Films 462-463 (SPEC. ISS.) : 1-5. ScholarBank@NUS Repository. https://doi.org/10.1016/j.tsf.2004.05.120 | |
dc.identifier.issn | 00406090 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/54148 | |
dc.description.abstract | A simple and manufacturing worthy method to pattern a very thin channel body of the FinFET/Tri-gate MOSFET is presented. A channel body as thin as 40 nm using the phase-shift mask (PSM) technique with deep UV 248 nm lithography on UV 210 Shipley resist has been achieved, while having an inherently wider Source/Drain (S/D) extension region. The width of extension region was optimized using the Prolitho.3D lithography simulator for the exposure dose and reticle bias conditions. The device simulation of the wider S/D extension region performed using three-dimensional (3-D) Davinci device simulator shows the significant reduction in the S/D parasitic resistance. Furthermore, these patterns on photoresists like UV 210 provides the basis for the easy integration to the mainstream CMOS technology, hence the potential for manufacturability with higher device performance. © 2004 Elsevier B.V. All rights reserved. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1016/j.tsf.2004.05.120 | |
dc.source | Scopus | |
dc.subject | DUV 248 nm lithography | |
dc.subject | Fin patterning | |
dc.subject | FinFET | |
dc.subject | PSM | |
dc.subject | Tri-gate MOSFET | |
dc.type | Article | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.description.doi | 10.1016/j.tsf.2004.05.120 | |
dc.description.sourcetitle | Thin Solid Films | |
dc.description.volume | 462-463 | |
dc.description.issue | SPEC. ISS. | |
dc.description.page | 1-5 | |
dc.description.coden | THSFA | |
dc.identifier.isiut | 000223812800002 | |
Appears in Collections: | Staff Publications |
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