Please use this identifier to cite or link to this item: https://doi.org/10.1109/RTSS.2011.25
DC FieldValue
dc.titleScalable and precise refinement of cache timing analysis via model checking
dc.contributor.authorChattopadhyay, S.
dc.contributor.authorRoychoudhury, A.
dc.date.accessioned2013-07-04T08:40:55Z
dc.date.available2013-07-04T08:40:55Z
dc.date.issued2011
dc.identifier.citationChattopadhyay, S.,Roychoudhury, A. (2011). Scalable and precise refinement of cache timing analysis via model checking. Proceedings - Real-Time Systems Symposium : 193-203. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/RTSS.2011.25" target="_blank">https://doi.org/10.1109/RTSS.2011.25</a>
dc.identifier.isbn9780769545912
dc.identifier.issn10528725
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/42001
dc.description.abstractHard real time systems require absolute guarantees in their execution times. Worst case execution time (WCET) of a program has therefore become an important problem to address. However, performance enhancing features of a processor (e.g. cache) make WCET analysis a difficult problem. In this paper, we propose a novel approach of combining abstract interpretation and model checking for different varieties of cache analysis ranging from single to multi-core platforms. Our modeling is used to develop a precise yet scalable timing analysis method on top of the Chronos WCET analysis tool. Experimental results demonstrate that we can obtain significant improvement in precision with reasonable analysis time overhead. © 2011 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/RTSS.2011.25
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentCOMPUTER SCIENCE
dc.description.doi10.1109/RTSS.2011.25
dc.description.sourcetitleProceedings - Real-Time Systems Symposium
dc.description.page193-203
dc.description.codenPRSYE
dc.identifier.isiutNOT_IN_WOS
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