Please use this identifier to cite or link to this item:
|Title:||A write efficient PCM-aware sort||Authors:||Vamsikrishna, M.V.
|Issue Date:||2012||Citation:||Vamsikrishna, M.V.,Su, Z.,Tan, K.-L. (2012). A write efficient PCM-aware sort. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 7446 LNCS (PART 1) : 86-100. ScholarBank@NUS Repository. https://doi.org/10.1007/978-3-642-32600-4_8||Abstract:||There is an increasing interest in developing Phase Change Memory (PCM) based main memory systems. In order to retain the latency benefits of DRAM, such systems typically have a small DRAM buffer as a part of the main memory. However, for these systems to be widely adopted, limitations of PCM such as low write endurance and expensive writes need to be addressed. In this paper, we propose PCM-aware sorting algorithms that can mitigate writes on PCM by efficient use of the small DRAM buffer. Our performance evaluation shows that the proposed schemes can significantly outperform existing schemes that are oblivious of the PCM. © 2012 Springer-Verlag.||Source Title:||Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)||URI:||http://scholarbank.nus.edu.sg/handle/10635/41855||ISBN:||9783642325991||ISSN:||03029743||DOI:||10.1007/978-3-642-32600-4_8|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.