Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/41484
DC FieldValue
dc.titleIncremental satisfiability counting for real-time systems
dc.contributor.authorAndrei, Ş.
dc.contributor.authorChin, W.-N.
dc.date.accessioned2013-07-04T08:28:37Z
dc.date.available2013-07-04T08:28:37Z
dc.date.issued2004
dc.identifier.citationAndrei, Ş.,Chin, W.-N. (2004). Incremental satisfiability counting for real-time systems. Proceedings - IEEE Real-Time and Embedded Technology and Applications Symposium 10 : 482-489. ScholarBank@NUS Repository.
dc.identifier.isbn0769521487
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/41484
dc.description.abstractTesting constraints for real-time systems are usually verified through the satisfiability of propositional formulae. In this paper, we propose an alternative where the verification of timing constraints can be done by counting the number of truth assignments instead of boolean satisfiability. This number can also tell us how "far away" a given specification is from satisfying its safety assertion. Furthermore, specifications and safety assertions are often modified in an incremental fashion, where problematic bugs are fixed one at a time. To support this development, we propose an incremental algorithm for counting satisfiability. Our proposed incremental algorithm is optimal as no unnecessary nodes are created during each counting. This works for the class of expressions, known as path RTL ([1, 5]). To illustrate this application, we show how incremental satisfiability counting can be applied to a well-known rail-road crossing example, particularly when its specification is still being refined.
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentCOMPUTER SCIENCE
dc.description.sourcetitleProceedings - IEEE Real-Time and Embedded Technology and Applications Symposium
dc.description.volume10
dc.description.page482-489
dc.identifier.isiutNOT_IN_WOS
Appears in Collections:Staff Publications

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