Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/41218
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dc.titleDesign of clocked circuits using UML
dc.contributor.authorSun, Z.
dc.contributor.authorWong, W.-F.
dc.contributor.authorZhu, Y.
dc.contributor.authorPilakkat, S.K.
dc.date.accessioned2013-07-04T08:22:21Z
dc.date.available2013-07-04T08:22:21Z
dc.date.issued2005
dc.identifier.citationSun, Z.,Wong, W.-F.,Zhu, Y.,Pilakkat, S.K. (2005). Design of clocked circuits using UML. Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 2 : 901-904. ScholarBank@NUS Repository.
dc.identifier.isbn0780387368
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/41218
dc.description.abstractClocking is an essential component of any embedded system design. However, traditional design techniques are either short of clocking support or too complex for users. The Unified Modeling Language (UML) has been proposed as design tool in real time system design, but the clocking semantics has not been properly dealt with. In this paper, we will present our experience of using UML to design a clocked system. In particular, UML is used to model the digital down converter, an essential component of software radios. Our tool chain automatically generates the simulation as well as synthesizes the final implementation. © 2005 IEEE.
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentCOMPUTER SCIENCE
dc.description.sourcetitleProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
dc.description.volume2
dc.description.page901-904
dc.identifier.isiutNOT_IN_WOS
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