Please use this identifier to cite or link to this item: https://doi.org/10.1109/RTSS.2006.26
DC FieldValue
dc.titleInterface-based rate analysis of embedded systems
dc.contributor.authorChakraborty, S.
dc.contributor.authorLiu, Y.
dc.contributor.authorStoimenov, N.
dc.contributor.authorThiele, L.
dc.contributor.authorWandeler, E.
dc.date.accessioned2013-07-04T08:04:04Z
dc.date.available2013-07-04T08:04:04Z
dc.date.issued2006
dc.identifier.citationChakraborty, S., Liu, Y., Stoimenov, N., Thiele, L., Wandeler, E. (2006). Interface-based rate analysis of embedded systems. Proceedings - Real-Time Systems Symposium : 25-34. ScholarBank@NUS Repository. https://doi.org/10.1109/RTSS.2006.26
dc.identifier.isbn0769527612
dc.identifier.issn10528725
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/40428
dc.description.abstractInterface-based design is now considered to be one of the keys to tackling the increasing complexity of modern embedded systems. The central idea is that different components comprising such systems can be developed independently and a system designer can connect them together only if their interfaces match, without knowing the details of their internals. We use the concept of rate interfaces for compositional (correct-by-construction) design of embedded systems whose components communicate through data streams. Using the associated rate interface algebra, two components can be connected together if the output rate of one component is "compatible" with the input rate of the other component. We formalize this notion of compatibility and show that such an algebra is non-trivial because it has to accurately model the burstiness in the arrival rates of such data streams and the variability in their processing requirements. We discuss how rate interfaces simplify compositional design and at the same time help in functional and performance verification which would be difficult to address otherwise. Finally, we illustrate these advantages through a realistic case study involving a component-based design of a multiprocessor architecture running a picture-in-picture application. © 2006 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/RTSS.2006.26
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentCOMPUTER SCIENCE
dc.description.doi10.1109/RTSS.2006.26
dc.description.sourcetitleProceedings - Real-Time Systems Symposium
dc.description.page25-34
dc.description.codenPRSYE
dc.identifier.isiut000244448800003
Appears in Collections:Staff Publications

Show simple item record
Files in This Item:
There are no files associated with this item.

Google ScholarTM

Check

Altmetric


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.