Please use this identifier to cite or link to this item: https://doi.org/10.1109/71.946652
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dc.titleAn evaluation of cache invalidation strategies in wireless environments
dc.contributor.authorTan, K.-L.
dc.contributor.authorCai, J.
dc.contributor.authorOoi, B.C.
dc.date.accessioned2013-07-04T07:40:17Z
dc.date.available2013-07-04T07:40:17Z
dc.date.issued2001
dc.identifier.citationTan, K.-L., Cai, J., Ooi, B.C. (2001). An evaluation of cache invalidation strategies in wireless environments. IEEE Transactions on Parallel and Distributed Systems 12 (8) : 789-807. ScholarBank@NUS Repository. https://doi.org/10.1109/71.946652
dc.identifier.issn10459219
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/39378
dc.description.abstractCaching can reduce the bandwidth requirement in a wireless computing environment as well as minimize the energy consumption of wireless portable computers. To facilitate mobile clients in ascertaining the validity of their cache content, servers periodically broadcast cache invalidation reports that contain information of data that has been updated. However, as mobile clients may operate in a doze or even totally disconnected mode (to conserve energy), it is possible that some reports may be missed and the clients are forced to discard the entire cache content. In this paper, we reexamine the issue of designing cache invalidation strategies. We identify the basic issues in designing cache invalidation strategies. From the solutions to these issues, a large set of cache invalidation schemes can be constructed. We evaluate the performance of four representative algorithms-two of which are known algorithms (i.e., Dual-Report Cache Invalidation and Bit-Sequences) while the other two are their counterparts that exploit selective tuning (namely, Selective Dual-Report Cache Invalidation and Bit-Sequences with Bit Count). Our study shows that the two proposed schemes are not only effective in salvaging the cache content but consume significantly less energy than their counterparts. While the Selective Dual-Report Cache Invalidation scheme performs best in most cases, it is inferior to the Bit-Sequences with the Bit-Count scheme under high update rates.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/71.946652
dc.sourceScopus
dc.subjectAccess time
dc.subjectBit-sequences
dc.subjectCache invalidation
dc.subjectDisconnection
dc.subjectDoze mode
dc.subjectEnergy consumption
dc.subjectMobile computing
dc.typeArticle
dc.contributor.departmentCOMPUTER SCIENCE
dc.description.doi10.1109/71.946652
dc.description.sourcetitleIEEE Transactions on Parallel and Distributed Systems
dc.description.volume12
dc.description.issue8
dc.description.page789-807
dc.description.codenITDSE
dc.identifier.isiut000170571800002
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