Analytical modeling of multithreaded architectures

Abstract

Multithreading is used for hiding long memory latency in uniprocessors and multiprocessor computer systems and aims at increasing system efficiency. In such an architecture, a number of threads are allocated to each processing element (PE) and whenever a running thread becomes suspended the PE switches to another ready thread. In this paper, we discuss analytical modeling of coarsely multithreaded architectures and present two analytical models: (i) a deterministic model, where the timing parameters (e.g., context switching time, threads's run length, and memory latency) are assumed to be constant, and (ii) a stochastic model where the timing parameters are random variables. Both models provide a framework to study the dependence of the MTA efficiency on design parameters of the target architecture and its workload. The deterministic model, as well as asymptotic bounding analysis of the stochastic model, allows to determine upper bounds and some break points of the MTA efficiency such as stability (saturation) points, whereas the stochastic model provides more accurate prediction of the efficiency.