Study on etching and characterization of advanced gate stack

Abstract

The focus of this thesis is on the etching and characterization of some potential advanced gate stacks that can be used to replace poly Si and SiO2. Notched gate fabrication and device performance was studied using a gate stack consisting of poly Si on SiGe with different Ge concentration. A process to fabricate sub-50 nm poly Si gate length was developed using a technique similar to that of resist trimming. Etching characteristics of metal gate (TaN) on high-I? (HfO2) dielectric were also studied. Lastly, growth of interfacial layer between HfO2 and Si substrate by He-O2 and pure O2 plasma was characterized using Secondary Ion Mass Spectroscopy and ellipsometer.