TOWARD GENERAL-PURPOSE DYNAMIC DATAFLOW PROCESSING

Abstract

Modern compute-intensive technologies like AI, VR, and IoT challenge the performance of traditional CPUs in energy-constrained environments. Coarse-Grained Reconfigurable Architectures (CGRAs) are often considered an efficient, programmable alternative. Unlike CPUs, CGRAs enable direct data transfer between operations through a grid network, simplifying hardware design but facing challenges finding optimal routing between operations in limited time.

We introduce ultra-fast CGRA scheduling utilizing single-cycle multi-hop data transfer feature of advanced CGRA implementations. Our architecture, 3DRA, is dynamically programmable directly from an input dataflow graph aiming to expand use cases of reconfigurable architectures by enabling fast and easy programming. Additionally, we present GraphWave, a Processing-at-Memory graph processing accelerator that enhances message passing by optimizing the proximity of data and computing resources, and a novel network design to alleviate congestion. These innovations aim to meet the high-performance demands of modern applications while maintaining energy efficiency.