Please use this identifier to cite or link to this item:
https://doi.org/https://doi-org.libproxy1.nus.edu.sg/10.1021/acsnano.0c09441
DC Field | Value | |
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dc.title | Self-selective multi-terminal memtransistor crossbar array for in-memory computing | |
dc.contributor.author | Xuewei Feng | |
dc.contributor.author | Sifan Li | |
dc.contributor.author | Swee Liang Wong | |
dc.contributor.author | Shiwun Tong | |
dc.contributor.author | Li Chen | |
dc.contributor.author | Zhang Panpan | |
dc.contributor.author | Lingfei Wang | |
dc.contributor.author | Xuanyao Fong | |
dc.contributor.author | Dongzhi Chi | |
dc.contributor.author | Kah Wee Ang | |
dc.date.accessioned | 2023-09-11T06:49:50Z | |
dc.date.available | 2023-09-11T06:49:50Z | |
dc.date.issued | 2021-01-14 | |
dc.identifier.citation | Xuewei Feng, Sifan Li, Swee Liang Wong, Shiwun Tong, Li Chen, Zhang Panpan, Lingfei Wang, Xuanyao Fong, Dongzhi Chi, Kah Wee Ang (2021-01-14). Self-selective multi-terminal memtransistor crossbar array for in-memory computing. ACS Nano 15 (1) : 1764-1774. ScholarBank@NUS Repository. https://doi.org/https://doi-org.libproxy1.nus.edu.sg/10.1021/acsnano.0c09441 | |
dc.identifier.issn | 1936-0851 | |
dc.identifier.uri | https://scholarbank.nus.edu.sg/handle/10635/244848 | |
dc.description.abstract | Two-terminal resistive switching devices are commonly plagued with longstanding scientific issues including interdevice variability and sneak current that lead to computational errors and high-power consumption. This necessitates the integration of a separate selector in a one-transistor-one-RRAM (1T-1R) configuration to mitigate crosstalk issue, which compromises circuit footprint. Here, we demonstrate a multi-terminal memtransistor crossbar array with increased parallelism in programming via independent gate control, which allows in situ computation at a dense cell size of 3–4.5 F2 and a minimal sneak current of 0.1 nA. Moreover, a low switching energy of 20 fJ/bit is achieved at a voltage of merely 0.42 V. The architecture is capable of performing multiply-and-accumulate operation, a core computing task for pattern classification. A high MNIST recognition accuracy of 96.87% is simulated owing to the linear synaptic plasticity. Such computing paradigm is deemed revolutionary toward enabling data-centric applications in artificial intelligence and Internet-of-things. | |
dc.description.uri | https://pubs.acs.org/doi/10.1021/acsnano.0c09441 | |
dc.language.iso | en | |
dc.publisher | American Chemical Society | |
dc.subject | memtransistor | |
dc.subject | MoS2 | |
dc.subject | self-selective | |
dc.subject | multi-terminal | |
dc.subject | in-memory computing | |
dc.type | Article | |
dc.contributor.department | ELECTRICAL AND COMPUTER ENGINEERING | |
dc.description.doi | https://doi-org.libproxy1.nus.edu.sg/10.1021/acsnano.0c09441 | |
dc.description.sourcetitle | ACS Nano | |
dc.description.volume | 15 | |
dc.description.issue | 1 | |
dc.description.page | 1764-1774 | |
dc.published.state | Published | |
dc.grant.id | 152-70-00013 | |
dc.grant.id | 152-70-00012 | |
dc.grant.id | CRP24-2020-078 | |
dc.grant.fundingagency | A*STAR Science and Engineering Research Council | |
dc.grant.fundingagency | National Research Foundation, Prime Minister’s Office, Singapore | |
Appears in Collections: | Staff Publications Elements |
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File | Description | Size | Format | Access Settings | Version | |
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ACS Nano - 2021 - Feng - Self-Selective Multi-Terminal Memtransistor Crossbar Array for In-Memory Computing.pdf | 6.78 MB | Adobe PDF | CLOSED | None |
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