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Please use this identifier to cite or link to this item: https://doi.org/10.1109/EDTM53872.2022.9798261
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dc.titleExtremely- Scaled Channel Thickness ZnO FET with High Mobility 86 cm2/V-s, Low SS of 83mV/dec and Low Thermal Budget Process (<300°C)
dc.contributor.authorUmesh Chand
dc.contributor.authorChen Chun-Kuei
dc.contributor.authorManohar Lal
dc.contributor.authorSonu Hooda
dc.contributor.authorHasita Veluri
dc.contributor.authorZihang Fang
dc.contributor.authorShih-Hao Tsai
dc.contributor.authorAaron Voon-Yew Thean
dc.date.accessioned2022-10-12T01:00:01Z
dc.date.available2022-10-12T01:00:01Z
dc.date.issued2022-03-06
dc.identifier.citationUmesh Chand, Chen Chun-Kuei, Manohar Lal, Sonu Hooda, Hasita Veluri, Zihang Fang, Shih-Hao Tsai, Aaron Voon-Yew Thean (2022-03-06). Extremely- Scaled Channel Thickness ZnO FET with High Mobility 86 cm2/V-s, Low SS of 83mV/dec and Low Thermal Budget Process (<300°C). 2022 6th IEEE Electron Devices Technology & Manufacturing Conference (EDTM). ScholarBank@NUS Repository. https://doi.org/10.1109/EDTM53872.2022.9798261
dc.identifier.isbn978-1-6654-2179-9
dc.identifier.urihttps://scholarbank.nus.edu.sg/handle/10635/232257
dc.description.abstractIn this work, we report a facile approach to significantly improve the electrical performances of a bottom-gated zinc oxide (ZnO) FET through In-situ annealing treatment of ZnO channel layer. We demonstrated ZnO FETs with extremely scaled channel thickness t ZnO of 3 nm, achieving low SS of 83 mV/decade and the highest µeff of 86 cm2/V•s. We offered insights into the sensitive role of interlayer dielectric passivation on oxide device stability, often neglected by prior work
dc.language.isoen
dc.publisherIEEE
dc.rightsCC0 1.0 Universal
dc.rights.urihttp://creativecommons.org/publicdomain/zero/1.0/
dc.typeConference Paper
dc.contributor.departmentDEAN'S OFFICE (ENGINEERING)
dc.contributor.departmentELECTRICAL AND COMPUTER ENGINEERING
dc.description.doi10.1109/EDTM53872.2022.9798261
dc.description.sourcetitle2022 6th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)
dc.published.statePublished
dc.grant.idRSS2015-003
dc.grant.fundingagencyThis work was supported by Agency for Science, Technology and Research (A*STAR), Singapore under its AME Programmatic Funds (A1892b0026 and A18A1B0045), National Research Foundation Grant RSS2015-003, and the Singapore Hybrid-Integrated Next-Generation μ-Electronics (SHINE) Centre hosted at the National University of Singapore (NUS)
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