Please use this identifier to cite or link to this item:
https://doi.org/10.1109/ACCESS.2020.2977100
DC Field | Value | |
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dc.title | A full-passband linear-phase band-pass filter equalized with negative group delay circuits | |
dc.contributor.author | Shao, T. | |
dc.contributor.author | Wang, Z. | |
dc.contributor.author | Fang, S. | |
dc.contributor.author | Liu, H. | |
dc.contributor.author | Chen, Z.N. | |
dc.date.accessioned | 2021-08-24T02:39:08Z | |
dc.date.available | 2021-08-24T02:39:08Z | |
dc.date.issued | 2020 | |
dc.identifier.citation | Shao, T., Wang, Z., Fang, S., Liu, H., Chen, Z.N. (2020). A full-passband linear-phase band-pass filter equalized with negative group delay circuits. IEEE Access 8 : 43336-43343. ScholarBank@NUS Repository. https://doi.org/10.1109/ACCESS.2020.2977100 | |
dc.identifier.issn | 2169-3536 | |
dc.identifier.uri | https://scholarbank.nus.edu.sg/handle/10635/198966 | |
dc.description.abstract | A full-passband linear-phase band-pass filter (BPF) equalized with negative group delay circuits (NGDC) is proposed. The NGDCs are utilized to suppress the salient group delay at the edge of the passband of the traditional BPF for achieving the full-passband linear-phase characteristic. To obtain input- and output-port impedance matching, two BPFs loading NGDCs are center symmetrically configured by Wilkinson power dividers. To verify the design concept, a 3-order full-passband linear-phase BPF is designed and fabricated. From the measured results, the GD fluctuation is reduced by 74% from 0.57 to 0.15 ns, return loss is better than 10 dB, and the insertion loss variation is less than 3 dB within the frequency range from 2.142 to 2.804 GHz. The proposed BPF achieves a flat group delay in the whole passband and realizes the full-passband linear-phase characteristic. @ 2013 IEEE. | |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | |
dc.source | Scopus OA2020 | |
dc.subject | Band-pass filter | |
dc.subject | full-passband linear phase | |
dc.subject | group delay equalization | |
dc.subject | negative group delay circuits | |
dc.type | Article | |
dc.contributor.department | ELECTRICAL AND COMPUTER ENGINEERING | |
dc.description.doi | 10.1109/ACCESS.2020.2977100 | |
dc.description.sourcetitle | IEEE Access | |
dc.description.volume | 8 | |
dc.description.page | 43336-43343 | |
Appears in Collections: | Staff Publications Elements |
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