Highly Scaled Strained Silicon-On-Insulator Technology for the 5G Era: Impact of Geometry and Annealing on Strain Retention and Device Performance of nMOSFETs

Abstract

Strained silicon-on-insulator (SSOI) is a promising platform for 5G, which will require both high-performance and low-power complementary metal-oxide- semiconductor (CMOS) devices. Hence, it is important to understand the behavior of strain in SSOI at deeply scaled dimensions. We thus present a simulation study of SSOI technology, where the strain profiles of “fins” with different dimensions and layer thicknesses are analyzed. We discover, for the first time, that a buried oxide (BOX) as thin as 10-15 nm is able to effectively memorize the strain. It is also able to retain the strain under annealing up to 1000 °C, a result verified by the Raman measurements. Such a thin BOX enables a good back-gate control for dynamic threshold voltage (Vt) tuning of SSOI transistors. The ability to have a good performance enhancement (from strain), and dynamic Vt tunability (from thin BOX) makes SSOI favorable for 5G mixed-signal applications.