Please use this identifier to cite or link to this item: https://doi.org/10.1109/TCPMT.2019.2926792
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dc.titleTransmission Line Representation of the Capacitive Via-Plate Interaction Toward a Capacitor-Free Via Model
dc.contributor.authorGAO SIPING
dc.contributor.authorFrancesco de Paulis
dc.contributor.authorLIU ENXIAO
dc.contributor.authorGUO YONGXIN
dc.date.accessioned2020-11-12T01:31:59Z
dc.date.available2020-11-12T01:31:59Z
dc.date.issued2019-07-04
dc.identifier.citationGAO SIPING, Francesco de Paulis, LIU ENXIAO, GUO YONGXIN (2019-07-04). Transmission Line Representation of the Capacitive Via-Plate Interaction Toward a Capacitor-Free Via Model. IEEE Transactions on Components, Packaging and Manufacturing Technology. ScholarBank@NUS Repository. https://doi.org/10.1109/TCPMT.2019.2926792
dc.identifier.issn21563950
dc.identifier.urihttps://scholarbank.nus.edu.sg/handle/10635/183394
dc.publisherIEEE
dc.rightsCC0 1.0 Universal
dc.rights.urihttp://creativecommons.org/publicdomain/zero/1.0/
dc.typeArticle
dc.contributor.departmentELECTRICAL AND COMPUTER ENGINEERING
dc.description.doi10.1109/TCPMT.2019.2926792
dc.description.sourcetitleIEEE Transactions on Components, Packaging and Manufacturing Technology
dc.published.statePublished
dc.grant.idNational Research Foundation Singapore (NRF) (NRF-CRP17-2017-08)
dc.grant.fundingagencyNational Research Foundation, Singapore
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