FABRICATION OF SUB-0.5UM HIGH ELECTRON MOBILITY TRANSISTORS

Abstract

This project has developed the process steps to fabricate sub-0.5µm high electron mobility transistor (HEMT). The main process steps include mesa isolation, drain and source ohmic contact formation, Schottky gate formation, and device passivation. Both optical and electron beam lithography are used. Electron beam lithography (EBL) was performed using a modified Scanning Electron Microscope (SEM). This SEM-EBL system is capable of defining features smaller than 500A and has an alignment accuracy of ±20nm. Both GaAs and InGaAs channel HEMTs have been fabricated. A theoretical model was developed to model the characteristics of the GaAs channel HEMT. An enhancement mode and a depletion mode GaAs channel HEMT structure were analyzed using this model. The corresponding HEMT epilayer structures were grown and HEMT devices were fabricated. InGaAs channel HEMTs were only studied experimentally. The fabricated enhancement mode GaAs channel HEMT was characterized. Its characteristics were much poorer than the theoretical prediction. An extrinsic transconductance of 10mS/mm was measured. However, the measured characteristics of the depletion mode GaAs channel HEMT agree closely with the theoretical model. It has an average extrinsic transconductance of about 250mS/mm, which agrees closely with the theoretical value of 275mS/mm. A graphical comparison between the experimental and theoretical results was also made. The InGaAs channel HEMT was studied only experimentally. It has a measured extrinsic transconductance of 312mS/mm, which is slightly higher than that of the GaAs channel HEMT. Techniques to fabricate T-gates are also described. The side-beam exposure technique used allows the fabrication of T-gates with different head sizes.