Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/172114
Title: TECHNIQUES FOR EFFICIENT AND ACCURATE SIMULATION OF MIXED ANALOG & DIGITAL CIRCUITS
Authors: LEE TENG KIAT
Issue Date: 1995
Citation: LEE TENG KIAT (1995). TECHNIQUES FOR EFFICIENT AND ACCURATE SIMULATION OF MIXED ANALOG & DIGITAL CIRCUITS. ScholarBank@NUS Repository.
Abstract: VLSI technology is integrating increasingly more digital and analog functions in a single chip. There is hence an urgency in the Computer Aided Design (CAD) community to find efficient yet accurate transient simulation techniques to verify the correctness of mixed digital/analog circuit designs. This thesis explores different techniques at the logic and switch levels for such mixed mode transient simulation. To answer the need of submicron technology, the basic MOS transistor model used throughout this work is the nth power MOS model. This semi-empirical model, developed by Sakurai and Newton [41], includes many short channel effects of submicron devices and is yet computationally efficient. The basis of comparison in terms of simulation efficiency and accuracy is the electrical level. The ground work done at this level includes the incorpornation of the MOS model and understanding of simulation fundamentals. With decreasing feature size, circuit interconnects contribute a significant amount to overall circuit delays. Traditional logic simulator does not include the effect of interconnect resistance in their delay estimation. This work successfully includes interconnect resistance and source/drain resistance in delay calculations for any logic gate. Closed form expressions were derived for an inverter driving an R-C load. These expressions were later extended to include any series connected gates. On the switch level front, this work expands on an existing switch level technique known as ELogic [29]. In this technique, time taken for a node to change its voltage from one level to the next is calculated. A new way of treating tan-in nodes and calculating time step improves the simulation accuracy without sacrificing efficiency. This new technique achieves the objective of providing a smooth interface between logic and analog simulations. It is also fast, accurate, and robust enough to simulate analog circuits with strong feedback. Numerous examples are presented in each chapter to illustrate the results. The examples are practical circuits, showing that the technique developed in this work are suitable for real world applications.
URI: https://scholarbank.nus.edu.sg/handle/10635/172114
Appears in Collections:Master's Theses (Restricted)

Show full item record
Files in This Item:
File Description SizeFormatAccess SettingsVersion 
b19124776.pdf4.81 MBAdobe PDF

RESTRICTED

NoneLog In

Google ScholarTM

Check


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.