A general framework to realize an abstract machine as an ILP processor with application to java

Abstract

Abstract machines bridge the gap between a programming language and real machines. The thesis proposes a general purpose tagged execution framework which exploits the concept of abstract machine and may be used to construct a processor. The framework is suitable for any instruction architecture from RISC machines to stack machines. In the thesis, we demonstrate a detailed design and implementation with a Java ILP processor using a VLIW execution engine as an example. The processor uses instruction-tagging and stack-folding to generate the tagged register-based instructions. When the tagged instructions are ready, they are bundled depending on data availability (i.e., out of order) to form VLIW-like instruction words and issued in-order. The tag-based mechanism accommodates memory load delays as instructions are scheduled for execution only after operands are available to allow tags to be matched to values with less added complexity. The performance evaluations are conducted through a detailed simulation experiments.