Please use this identifier to cite or link to this item: https://doi.org/10.1109/SISPAD.2013.6650652
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dc.titleA hybrid spin-charge mixed-mode simulation framework for evaluating STT-MRAM bit-cells utilizing multiferroic tunnel junctions
dc.contributor.authorFong, X
dc.contributor.authorRoy, K
dc.date.accessioned2019-07-03T03:51:19Z
dc.date.available2019-07-03T03:51:19Z
dc.date.issued2013-12-31
dc.identifier.citationFong, X, Roy, K (2013-12-31). A hybrid spin-charge mixed-mode simulation framework for evaluating STT-MRAM bit-cells utilizing multiferroic tunnel junctions. 2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) : 372-375. ScholarBank@NUS Repository. https://doi.org/10.1109/SISPAD.2013.6650652
dc.identifier.isbn9781467357364
dc.identifier.urihttps://scholarbank.nus.edu.sg/handle/10635/156199
dc.description.abstractMultiferroic tunnel junctions (MFTJs) consisting of ferromagnetic contacts sandwiching a ferroelectric tunnel barrier have been proposed as possible data storage elements. However, a simulation framework is needed for evaluating and analyzing the design and performance of memory cells based on MFTJs. In this paper, we propose a spin-charge mixed-mode simulation framework that captures the device physics of the MFTJ for SPICE circuit simulations. © 2013 IEEE.
dc.publisherIEEE
dc.sourceElements
dc.typeConference Paper
dc.date.updated2019-07-03T03:40:18Z
dc.contributor.departmentELECTRICAL AND COMPUTER ENGINEERING
dc.description.doi10.1109/SISPAD.2013.6650652
dc.description.sourcetitle2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)
dc.description.page372-375
dc.published.statePublished
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