OPTIMUM MATERIAL COMPOSITION FOR CONTACTING INTERFACE IN TESTING OF LEAD-FREE DEVICE

Abstract

Lead-free devices are treated as the replacement of the more matured Leaded devices in support of the Green Initiative being adopted by countries around the world. However, in order to make Lead-free devices as the perfect replacement to fulfill the proliferation of worldwide integrated circuit chips demand, the yield and cleaning frequency for testing operation will need to be improved for the successful implementation of the devices. Yields are directly related to junction resistance at the contacting point between device I/O and pins. The underlying factors that caused testing results variances between Leaded and Lead-free devices are contacting area, material intrinsic characteristics and processing parameters. They are then verified by experimental proof, to find out the possible parameters to be improved. Parameters under study are surface morphology, oxygen reactivity, grain size, chemical and phase analysis, resistance, modulus and hardness. It was found out that Lead-free BGA have higher yields due to their lower resistivity. However, Lead-free QFN suffers from low yield and frequent cleaning due to higher oxygen reactivity, higher wear-off rate and whisker problem. Solutions that proposed to encounter these problems are to choose different plating processes and to control over plating process parameters. Redesign the pin structures and test programs are identified as long term solutions. Thicker and harder gold layer and better cleaning methods are needed to further optimize testing conditions.