DEVELOPING NEW SAMPLE PREPARATION METHODS UTILIZING ASAP-1

Abstract

As the circuit features keep shrinking down, the failure analysis becomes more and more challenging. As the first and an essential step, conventional sample preparation methods for packages and wafers are being challenged by the advance of the IC manufacturing. As the device becomes smaller and smaller, the success rate of deprocessing is lowered. To address this problem, new advanced sample preparation methods have to be developed. This internship project attached to Chartered Semiconductor Manufacturing is aiming for this task. The project will be focus on developing new sample preparation methods at both package level and wafer level. The main facility used for the experiment is ASAP, which stands for Automatic Selected Area Polisher. This machine use mechanical tools to remove materials from the sample, with controllable speed, area and time.