Formation of advanced gate stacks and their application to nano structure devices

Abstract

Physical and chemical mechanisms on the formation of advanced gate stacks for the future nano-scale planar CMOS and NVM devices are explored. Plasma etching and wet removal properties of Hf based high-K gate were investigated. It was found that the crystallized HfO2 phase is the main reason for the rapid decrease of the wet etch rate of Hf based high-K dielectrics after anneal. Plasma can destroy the crystalline structure, resulting in a large increase of etch rate. Plasma etch rate varied depending on the chemical components in the Hf based high-K dielectrics. Formation of Ge nanocrystals embedded in HfAlO was studied. Physical characterization shows a good thermal stability of this structure. A self-assembly technique of Al2O3 nano-dots on SiO2 has also been developed to suppress lateral migration of electrons via Frenkel-Poole tunneling.