Characterization of hot carrier reliability in deep submicronmeter MOSFETs

Abstract

This research aims to advance the understanding of several key aspects of the device reliability of deep submicrometer CMOS devices.The impact of indium channel implantation on the current-voltage characteristics, gate oxide breakdown and hot carrier reliability of deep submicrometer n-MOSFET is studied in detail. The reliability of 0.18 um n-MOSFETs stressed under hot carrier injection and enhanced by substrate bias, is studied. The manipulation of high-energy tail electrons (HETEs) via substrate bias is used as a scientific tool to probe the fundamental mechanisms governing the interface and oxide degradation. New experimental evidence provides important insights into the basic mechanism responsible for the shift of the worst-case stress condition in scaled MOSFETs. The role of HETEs in the continued existence of the hot electron gate current and the impact of a non-local hot electron injection on the predominant source-side gate oxide degradation are studied.